The 2007 Anita Borg Award for Technical Leadership Winner
From Anita Borg Institute Wiki
The 2007 Anita Borg Award for Technical Leadership Winner
Presenter:
Mary Jane Irwin, Dept of Computer Science & Engineering, Penn State University
Introduction:
http://mdlwiki.cse.psu.edu/twiki/bin/view/Main/MaryJaneIrwin
Note: Due to technical difficulty this session was not fully captured. If you happened to attend this session, please post your notes.
Talk topic:
Keeping with theme of conference, Mary is looking forward and going to talk about future challenges in computer architecture.
Subject: The Multicore Revolutions: Challenges and Opportunities
Abstract:
Moore’s Law continues to hold resulting in a doubling of the number transistors integrated on a single chip every two years. However, thermal issues and global interconnect speed issues have made it impossible to use this plethora of transistors in the design of a single, advanced processor that runs at a faster clock rate to provide a doubling of performance. However, two processors running at the slower clock rate will fit on today’s chips and will provide, in theory, this doubling of performance. Soon, four core chips will appear on the market. This talk will focus on the challenges and research opportunities brought about by the multi‐core revolution that is upon us. These include architectural challenges (e.g., global interconnect options), resiliency challenges (e.g., faulty cores due to soft error upsets, process variation, aging effects, thermal hot spots), on‐chip memory hierarchy design (e.g., NUCA), power/energy challenges, and programming challenges. Some initial research results that give insight into several of these challenge area will be presented. Ultimately, multi‐core computing resources (time, space, communication) and emerging computing resources (power, resiliency, security) will have to be cooperatively managed by the programmer, by the run‐time system, by the compilation system, and by dynamic controls in the underlying circuitry.
Source: http://www2.eng.usf.edu/news/lecture.pdf
Moore’s Law:
Number of transistor on chip will double every two year
Wiki link - http://en.wikipedia.org/wiki/Moore's_law
With increasing feature size, there are 6 billion transistors to work with which is pretty exciting job for a computer architect.
Feature size and die size
Between 2000 and 2005, 1.6x chip power increase and heat flux by 2x which are primary problems at hand.
Main culprits – Increasing clock frequencies and Technology scaling- Leaky transistors