Dynamic NBTI Management in Multicore Processor

From Anita Borg Institute Wiki

Presenter: Taniya Siddiqua (University of Virginia)

NBTI is an emerging silicon reliability problem. In this work we explore a combined approach to mitigate NBTI in the functional units (FUs) which exploit system-level, microarchitecture-level and circuit-level optimizations. At microarchitecture-level, we propose an NBTI-aware instruction scheduling policy. Also, we design an NBTI-aware FU which uses a circuit-level technique 'Power Gating'. Combining both these techniques achieves an attractive improvement in the lifetime reliability. Applying system-level optimization is our future work.